The present invention relates to semiconductor devices, to semiconductor substrates, and to their manufacture methods. The present invention more particularly pertains to a semiconductor device including a lattice defect-suppressed, Group III nitride semiconductor layer.
In recent years, intensive research and development of blue semiconductor laser elements, high-speed operation transistors, et cetera employing Group III nitride semiconductor materials (for example, GaN-based compound semiconductor materials), have been conducted. FIG. 18 shows in cross section the structure of a conventional semiconductor device including a Group III nitride semiconductor layer. In order to provide clear viewing of the structure, the cross section is represented with no hatching drawn therein.
The semiconductor device (FIG. 18) is a semiconductor laser element that comprises nitride semiconductor. In this semiconductor device, a GaN buffer layer 2, an n-type GaN layer 3, an n-type AlGaN clad layer 4, an n-type GaN light guide layer 5, an undope InGaN active layer 6, a p-type GaN light guide layer 7, a first p-type AlGaN clad layer 8, a current constriction layer 10 with an opening 9, a second p-type AlGaN clad layer 11, and a p-type GaN contact layer 12 are formed sequentially in that order on a sapphire substrate 1. Attached to an exposed surface area of the n-type GaN layer 3 is an n-type electrode 13. On the other hand, a p-type electrode 14 is attached to the p-type GaN contact layer 12. The buffer layer 2 is for the reduction of lattice mismatching between the sapphire substrate 1 and the n-type GaN layer 3, thereby to facilitate crystal growth. Accordingly, the buffer layer 2 has no direct influence on the operation of the semiconductor element.
The undope InGaN active layer 6 of the semiconductor device comprises nitride semiconductor. Because of this, application of a given voltage to the n- and p-type electrodes 13 and 14 enables the semiconductor device to act as a laser element capable of oscillation of blue light. However, in this conventional semiconductor device, there exists a lattice defect 15 in the form of a stripe within the n-type GaN layer 3 (FIG. 18). With the crystal growth of the n-type GaN layer 3, the n-type AlGaN clad layer 4, etc., the lattice defect 15 extends upwardly. This results in the existence of the lattice defect 15 (e.g., threading dislocation) in the opening 9 of the current constriction layer 10 in the undope InGaN active layer 6 which functions as an active region of the semiconductor laser element.
For the case of semiconductor devices in need of high current injection such as semiconductor laser elements, if the lattice defect 15 exists, deterioration starts from a portion of the lattice defect 15. Such deterioration will considerably reduce the life span and the reliability of semiconductor devices. Not only in the active layer of the semiconductor laser element of FIG. 18, but also in the gate region of the semiconductor transistor element which operates at high speed, the existence of a lattice defect causes problems. That is, if there exists a lattice defect in a gate region, this results in the drop in carrier mobility, and the performance of the semiconductor transistor element drops. As described above, if there exists a lattice defect in an area that functions as the active region of the semiconductor element (e.g., an active layer of the semiconductor laser element or a transistor gate region), this results in deterioration in semiconductor element performance.
Recently, various techniques for obtaining a lattice defect-suppressed, nitride semiconductor layer have been proposed. For example, in one such technique, an SiO2 mask layer with an opening is formed atop a sapphire substrate. This is followed by lateral growth of a GaN layer by CVD (for example, MOCVD) to obtain a nitride semiconductor layer with a reduced lattice defect density (see JP Kokai Publication No. H11-312825, JP Kokai Publication No. H11-340508, and JP Kokai Publication No. 2000-21789). Further, the present applicant proposed another technique (for example, see JP Kokai Publication No. 2000-156524), in which a GaN layer, whose surface is indented in the form of, for example, a stripe-like groove, is formed on a sapphire substrate and a nitride semiconductor layer is deposited on the sapphire substrate, for obtaining a nitride semiconductor layer with a reduced lattice defect density.
The former technique making use of an SiO2 mask layer can provide a lattice defect-suppressed nitride semiconductor layer but suffers the problem that the SiO2 mask layer remains within the semiconductor device. The SiO2 mask layer is lower in heat transfer rate than the nitride semiconductor layer, so that if the SiO2 mask layer is left in the semiconductor device, the semiconductor device becomes poor in heat radiation, and the reliability of the semiconductor device drops. Further, in addition to the step of forming a nitride semiconductor layer, another step of forming an SiO2 mask layer is required. The manufacture process becomes complicated. On the other hand, the latter technique proposed by the present applicant can avoid, for example, the problem of poor heat radiation, for it does not use an SiO2 mask. However, when a stripe-like groove is used to suppress lattice defects, the latter technique has difficulty in doing so in a direction along the stripe direction.
Bearing in mind the above-described points, the present invention was made. Accordingly, a major object of the present invention is to provide a semiconductor device, and a semiconductor substrate and its manufacture method for reduction in the lattice defect density.
The present invention provides a semiconductor device which comprises a substrate in which surface is formed a depression having a closed figure when viewed from the substrate normal and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least an inside face of the depression.
Preferably, the depression includes at least two adjacent inside faces unparallel to the surface of the substrate and an angle, formed by two line segments created by intersecting of the two inside faces and a plane parallel to the surface of the substrate, is either 60 degrees or 120 degrees.
In an embodiment of the present invention, the figure of the-depression is either substantially an equilateral triangle or substantially an equilateral hexagon.
Preferably, the substrate comprises a semiconductor layer having a hexagonal crystal structure and the depression is formed in a surface of the aforesaid semiconductor layer.
Preferably, the semiconductor layer constituting the substrate and the semiconductor layer formed on the surface of the substrate each comprise nitride semiconductor.
Preferably, the inside face of the depression is either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane.
In an embodiment of the present invention, the number n is 1.
Preferably, a plurality of the depressions are formed in the surface of the substrate.
Preferably, a plurality of semiconductor layers including at least an active layer are formed on the substrate.
The present invention provides another semiconductor device which comprises a substrate on which surface is formed a projection and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least a side face of the projection wherein the projection includes at least two adjacent side faces unparallel to the surface of the substrate and wherein an angle, formed by two line segments created by intersecting of the two side faces and a plane parallel to the surface of the substrate, is either 60 degrees or 120 degrees.
Preferably, the substrate comprises a semiconductor layer having a hexagonal crystal structure and the projection is formed on a surface of the aforesaid semiconductor layer.
Preferably, the semiconductor layer constituting the substrate and the semiconductor layer formed on the surface of the substrate each comprise nitride semiconductor.
Preferably, the side face of the projection is either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane.
In an embodiment of the present invention, the number n is 1.
Preferably, a plurality of the projections are formed on the surface of the substrate.
Preferably, a plurality of semiconductor layers including at least an active layer are formed on the substrate.
The present invention provides a method for the manufacture of a semiconductor device, the method comprising a step of preparing a substrate in which surface is formed a depression having a closed figure when viewed from the substrate normal; and a step of forming on the surface of the substrate a semiconductor layer having a hexagonal crystal structure.
The present invention provides a method for the manufacture of a semiconductor device, the method comprising a step of preparing a substrate, a step of forming on a surface of the substrate a depression having a closed figure when viewed from the substrate normal, and a step of forming on the surface of the substrate a semiconductor layer having a hexagonal crystal structure.
Preferably, the depression forming step is performed such that an inside face of the depression is defined by either a plane having a plane orientation of (1, xe2x88x921, 0, 1) or its equivalent plane.
Preferably, the depression forming step is the step of forming on the major surface of the substrate defined by a (0, 0, 0, 1) plane a depression having a bottom face whose figure is either an equilateral triangle or an equilateral hexagon.
Preferably, the semiconductor layer forming step is the step of forming a semiconductor layer in which an inside face of the depression serves as a crystal growth surface.
Preferably, the semiconductor layer forming step includes a step in which the semiconductor layer crystal grows in a vertical direction from the inside face of the depression.
Preferably, the semiconductor layer forming step is the step of forming a semiconductor layer in which an inside face of the depression serves as a crystal growth surface.
Preferably, the semiconductor layer forming step includes a step in which the semiconductor layer crystal grows in a vertical direction from the inside face of the depression.
In an embodiment of the present invention, the semiconductor layer forming step is the step of forming a layer which comprises Group III nitride-based compound semiconductor.
In another embodiment of the semiconductor layer forming step is the step of forming a layer which comprises Group III nitride-based compound semiconductor.
In an embodiment of the present invention, the Group III nitride-based compound semiconductor layer is grown by a metal organic vapor epitaxy method.
In another embodiment of the present invention, the Group III nitride-based compound semiconductor layer is grown by a metal organic vapor epitaxy method.
Preferably, the substrate preparing step is the step of preparing a sapphire substrate on which surface is formed a Group III nitride-based compound semiconductor layer and the depression forming step is the step of forming the depression in a surface of the Group III nitride-based compound semiconductor layer.
The present invention provides a semiconductor substrate which comprises a substrate in which surface is formed a depression having a closed figure when viewed from the substrate normal and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least an inside face of the depression.
Preferably, the depression includes at least two adjacent inside faces unparallel to the surface of the substrate and an angle, formed by two line segments created by intersecting of the two inside faces and a plane parallel to the surface of the substrate, is either 60 degrees or 120 degrees.
In an embodiment of the present invention, the figure of the depression is either substantially an equilateral triangle or substantially an equilateral hexagon.
Preferably, the substrate comprises a semiconductor layer having a hexagonal crystal structure and the depression is formed in a surface of the semiconductor layer.
Preferably, the semiconductor layer constituting the substrate and the semiconductor layer formed on the surface of the substrate each comprise nitride semiconductor.
Preferably, the inside face of the depression is either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane. In an embodiment of the present invention, the number n is 1.
Preferably, a plurality of the depressions are formed in the surface of the substrate.
The present invention provides a semiconductor substrate which comprises a substrate on which surface is formed a projection and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least a side face of the projection, wherein the projection includes at least two adjacent side faces unparallel to the surface of the substrate and wherein an angle, formed by two line segments created by intersecting of the two side faces and a plane parallel to the major surface of the substrate, is either 60 degrees or 120 degrees.
In an embodiment of the present invention, the substrate comprises a semiconductor layer having a hexagonal crystal structure and the projection is formed on a surface of the semiconductor layer.
Preferably, the semiconductor layer constituting the substrate and the semiconductor layer formed on the surface of the substrate each comprise nitride semiconductor.
Preferably, the side face of the projection is either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane.
In an embodiment of the present invention, the number n is 1.
Preferably, a plurality of the projections are formed on the surface of the substrate.
The present invention provides a method for the manufacture of a semiconductor substrate, the method including a step of preparing a substrate for crystal growth, a step of depositing on the crystal growth substrate a first semiconductor layer having a hexagonal crystal structure, a step of exposing either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane by subjecting a part of the first semiconductor layer to an etching process, and after the exposing step, a step of depositing on the first semiconductor layer a second semiconductor layer having a hexagonal crystal structure.
Preferably, the exposing step includes a step of applying onto the first semiconductor layer a resist pattern having an opening whose figure is either substantially an equilateral triangle, or substantially an equilateral hexagon when viewed from the substrate normal, and a step of forming a depression by subjecting the first semiconductor layer to an etching process in which the resist pattern is used as a mask so that the depression has an inside face comprising either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number, or its equivalent plane.
Preferably, the resist pattern has a plurality of the openings arrayed at equal intervals.
Preferably, the exposing step includes a step of applying onto the first semiconductor layer a resist pattern whose figure is either substantially an equilateral triangle, or substantially an equilateral hexagon when viewed from the substrate normal, and a step of forming a projection by subjecting the first semiconductor layer to an etching process in which the resist pattern is used as a mask so that the projection has a side face comprising either a plane having a plane orientation of (1, xe2x88x921, 0, n) where the number n is an arbitrary number or its equivalent plane.
Preferably, the resist pattern comprises a plurality of the resist patterns arrayed at equal intervals.
The present invention provides a method for the manufacture of a semiconductor substrate, the method comprising a step of forming a substrate having on a surface thereof a depression having a closed figure when viewed from the substrate normal, a step of forming on the surface of the substrate a semiconductor layer having a hexagonal crystal structure, and a step of taking out the semiconductor layer by removal of the substrate.
Preferably, the depression has an inside face defined by either a plane having a plane orientation of (1, xe2x88x921, 0, 1) or its equivalent plane.
Preferably, the depression has, in the major surface of the substrate defined by a (0, 0, 0, 1) plane, a bottom face whose figure is either an equilateral triangle or an equilateral hexagon.
The present invention provides a method for the manufacture of a semiconductor substrate, the method comprising a step of forming a substrate having on a surface thereof a projection, a step of forming on the surface of the substrate a semiconductor layer having a hexagonal crystal structure, and a step of taking out the semiconductor layer by removal of the substrate.
Preferably, the projection has a side face defined by either a plane having a plane orientation of (1, xe2x88x921, 0, 1) or its equivalent plane.
Preferably, the projection has, in the major surface of the substrate defined by a (0, 0, 0, 1) plane, a bottom face whose figure is either an equilateral triangle or an equilateral hexagon.
In an embodiment of the present invention, the semiconductor layer forming step is the step of forming a layer of Group III nitride-based compound semiconductor.
In another embodiment of the present invention, the semiconductor layer forming step is the step of forming a layer of Group III nitride-based compound semiconductor.
In an embodiment of the present invention, the Group III nitride-based compound semiconductor layer is grown by hydride vapor phase epitaxy.
In another embodiment of the present invention, the Group III nitride-based compound semiconductor layer is grown by hydride vapor phase epitaxy.
Preferably, the substrate forming step includes a step of preparing a sapphire substrate and a step of forming on the sapphire substrate a Group III nitride-based compound semiconductor layer having the depression in a surface thereof.
Preferably, the substrate forming step includes a step of preparing a sapphire substrate and a step of forming on the sapphire substrate a Group III nitride-based compound semiconductor layer having the projection on a surface thereof.